1. Field of the Invention
The present invention relates to a DC/DC converter and a controlling method thereof, and more particularly to a current-mode DC/DC converter.
2. Description of the Related Art
A DC/DC converter is a device for converting a certain DC voltage into a different DC voltage, and is used in various fields.
FIG. 1 is a circuit diagram of a conventional DC/DC converter. This DC/DC converter operates with PWM (Pulse-Width Modulation), and is sometimes called a switching regulator. This DC/DC converter monitors an electric current flowing through an inductor, and adjusts an output DC voltage based on the current.
Switches M1 and M2 are, for example, a pair of MOS transistors which are connected in series and are respectively turned on or off according to the driving signals V.sub.U and V.sub.L provided from a driving circuit 101. An input voltage V.sub.in is applied to the switch M1, while the switch M2 is grounded.
Fundamentally, the switches M1 and M2 are alternately turned on or off according to the state of a flip-flop 102. When the flip-flop 102 is in a set state, the switch M1 is ON and switch M2 is OFF, and an inductor current I.sub.L which flows via an inductor L increases (ramps up). If the flip-flop 102 is in a reset state, the switch M1 is OFF and switch M2 is ON, and the inductor current I.sub.L decreases (ramps down). An output capacitor C.sub.out is arranged to smooth an output voltage.
In this DC/DC converter, the output voltage V.sub.out and the inductor current I.sub.L are used as feedback signals for controlling the switches M1 and M2. An error amplifier 103 amplifies the difference between the output voltage V.sub.out (or a voltage obtained by dividing the output voltage V.sub.out with a resistor network composed of resistors R1 and R2) and a predetermined reference voltage V.sub.ref, and outputs the amplified difference as a current instruction signal I.sub.cont. A comparator 104 makes a comparison between an inductor current signal I.sub.curr representing the inductor current I.sub.L and the current instruction signal I.sub.cont output from the error amplifier 103. Then, the comparator 104 outputs the result of the comparison as a reset signal V.sub.res.
An oscillator 105 generates a set signal. The set signal is a pulse signal which is synchronous with the oscillation frequency of the oscillator 105. The set signal is input to the set terminal of the flip-flop 102 via an AND gate (one of whose inputs is a negative logic) 106, while the reset signal from the comparator 104 is input to the reset terminal of the flip-flop 102.
Next, the operations of the DC/DC converter are explained by referring to FIG. 2. Upon receipt of the set pulse from the oscillator 105, the flip-flop 102 enters the set state. When the flip-flop 102 enters the set state, the driving signal V.sub.L is changed from "H" to "L" and the driving signal V.sub.U is changed from "L" to "H". As a result, the switch M2 is turned off and switch M1 is turned on. Then, the inductor current I.sub.L starts to increase.
When the inductor current signal I.sub.curr representing the inductor current I.sub.L reaches the current instruction signal I.sub.cont being the output of the error amplifier 103, the output of the comparator 104 is changed from "L" to "H", and is provided to the reset terminal of the flip-flop 102.
Upon receipt of "H" at the reset terminal, the flip-flop 102 enters the reset state. When the flip-flop 102 enters the reset state, the driving signal V.sub.U is changed from "H" to "L" and the driving signal V.sub.L is changed from "L" to "H". Consequently, the switch M1 is turned off and the switch M2 is turned on. Then, the inductor current I.sub.L starts to decrease. Thereafter, the above described operations are repeated when the next set pulse is generated by the oscillator 105 and the generated set pulse is input to the set terminal of the flip-flop 102. That is, the DC/DC converter fundamentally repeats the above described operations in synchronization with the oscillation frequency of the oscillator 105.
As described above, with the DC/DC converter shown in FIG. 1, the output voltage V.sub.out is held constant by controlling the inductor current I.sub.L with the use of the current instruction signal I.sub.cont generated based on the output voltage V.sub.out. The output voltage to be held by this DC/DC converter is determined by the reference voltage V.sub.ref.
Fundamentally, the switches M1 and M2 are alternately turned on and off. However, if these two switches are simultaneously ON, their elements can possibly be destroyed by a large current. Accordingly, what is called a dead time is provided to the driving signals V.sub.u and V.sub.L in order to prevent the switches M1 and M2 from being simultaneously ON.
Normally, noise occurs in a DC/DC converter when a switch is turned on or off, and frequently causes erroneous operations. A problem caused by the noise at the switching timing is described next by referring to FIG. 3.
At a time T1, the set pulse of the set signal is generated and provided to the set terminal of the flip-flop 102. Here, the AND gate 106 is assumed to be open at the time T1.
When the flip-flop 102 enters the set state according to this set pulse, the inductor current I.sub.L then starts to increase as described above. When the inductor current signal I.sub.curr representing the inductor current I.sub.L reaches the current instruction signal I.sub.cont, the output of the comparator 104 (reset signal) is changed from "L" to "H". Because a circuit delay exists, a predetermined amount of time is required from when the inductor current signal I.sub.curr exceeds the current instruction signal I.sub.cont until when the reset signal is actually changed from "L" to "H".
When the reset signal is changed to "H", the flip-flop 102 enters the reset state and the inductor current I.sub.L then starts to decrease as described above.
When the next pulse is generated and the flip-flop 102 is changed from the reset state to the set state at a time T3, the driving signal V.sub.L for controlling the switch M2 is changed from "H" to "L". As a result, the switch M2 is turned off. In the meantime, the dead time is arranged for the driving signal V.sub.U for controlling the switch M1. Therefore, the switch M1 remains OFF.
When the switch M2 is turned off, noise occurs in the inductor current signal I.sub.curr. Furthermore, if the inductor current signal I.sub.curr exceeds the current instruction signal I.sub.cont due to this noise, the reset signal is changed from "L" to "H". However, the predetermined amount of time is required from when the inductor current signal I.sub.curr exceeds the current instruction signal I.sub.cont until when the reset signal is actually changed from "L" to "H", as described above. Therefore, the reset signal is changed from "L" to "H" at a time T5.
In the meantime, the driving signal V.sub.U for controlling the switch M1 is changed from "L" to "H" at the timing (time T4 ) when the dead time elapses from the time T3. Accordingly, in this case, the switch M1 is immediately turned off at the time T5 after being turned on at the time T4. Namely, in this case, the inductor current I.sub.L continues to decrease after the time T5 until the next set pulse is generated at a time T6.
When the next set pulse is generated at the time T6 after that, the flip-flop 102 is changed from the reset state to the set state and the inductor current I.sub.L continues to increase until the inductor current signal I.sub.curr reaches the current instruction signal I.sub.cont.
When noise, etc. occurs in the signal for controlling the switch M1 or M2 as described above, the inductor current I.sub.L may sometimes become unstable. That is to say, the inductor current I.sub.L regularly change in an ideal state where no noise occurs, as shown in FIG. 2. However, the inductor current I.sub.L may irregularly change in some cases when noise occurs, as shown in FIG. 3. Since the time period during which the switch M1 is ON becomes shorter than that of a normal operation according to the reset pulse generated due to noise in the example shown in FIG. 3, a sufficient inductor current I.sub.L does not flow from the time T3 to the time T6. Therefore, the switch M1 is held ON during a time period which is longer than that of a normal operation so as to make up for the insufficient inductor current I.sub.L after the time T6. Consequently, the fluctuations of the inductor current I.sub.L become significant, which leads to an increase in the fluctuations of the output voltage V.sub.out (ripple voltage).
In the example provided above, the driving signal V.sub.U for controlling the switch M1 is changed from "L" to "H" before the reset pulse is generated due to noise. However, depending on the relationship between the dead time and the delay time of the comparator 104 and so on, the reset pulse is generated before the driving signal V.sub.U is changed from "L" to "H". In this case, the set pulse is not provided to the flip-flop 102 in the configuration comprising a reset preceding circuit (AND gate 106) like the DC/DC converter shown in FIG. 1, and the switch M1 is not turned on. As a result, the switching cycle temporarily becomes longer also in this case, and the ripple of the output voltage becomes large.
In recent years, the tolerable value of the ripple, which is demanded by a load, has become stricter. Accordingly, it is vital to reduce the ripple of the output voltage of a DC/DC converter.